Design Verification Engineer

Design Verification Engineer Overview

An expanding US-founded hardware company has recently established a presence in the UK and is building out a specialist engineering team focused on advanced AI and IP-driven silicon development. The business is assembling a group that includes ASIC designers, verification engineers, and architects, and it is looking for an experienced verification specialist to join at an early stage. This is presented as a rare chance to help shape the company’s hardware capability from the beginning and to contribute to the development of sophisticated platforms for modern computing workloads.

The role sits within a fabric IP environment and centers on verification work for highly configurable IP used to connect components across SoCs, chiplets, and multi-chiplet systems. The company is particularly interested in engineers who can bring deep practical verification experience, strong testbench development skills, and the ability to collaborate across hardware and software teams.

What you will do

• Build verification plans for configurable IP blocks that enable communication and interconnectivity across SoC, chiplet, and multi-chiplet architectures.
• Develop UVM and SystemVerilog-based verification components, including tests, checkers, and scoreboards, to implement the planned verification strategy.
• Work with software engineers to create and refine configurable testbenches that can support complex verification needs.
• Partner with design engineers on verification planning, issue investigation, failure analysis, and coverage closure.
• Contribute to the verification of advanced hardware IP that supports AI and next-generation computing systems.
• Help influence the company’s technical direction as part of a small, early-stage engineering team in the UK.

What the company is looking for

• A degree at bachelor’s or master’s level in Electrical Engineering, Computer Engineering, or Computer Science.
• At least five years of recent, hands-on experience in verification at block, IP, or SoC level.
• Strong command of Verilog and SystemVerilog in a practical verification setting.
• Extensive experience creating and maintaining UVM-based testbenches.
• Familiarity with standard EDA tools used for simulation and debugging.
• Ability to use modern programming languages such as Python in a verification workflow.
• Knowledge of Arm AMBA protocols, including AXI, APB, and AHB.
• Additional value if you understand the Arm CHI protocol.
• Useful experience with IP related to caches, cache coherency, memory subsystems, interconnects, and NoC designs.
• Exposure to formal verification approaches is advantageous.
• Experience with emulation platforms is also considered beneficial.
• Applicants must already be based in the UK and currently working there.
• Applicants must be willing to work onsite in Bristol or Cambridge.

What is on offer

• A competitive salary package, with the base pay set according to experience.
• Share options.
• A bonus scheme tied to performance.
• The opportunity to join a company at an early stage of its UK growth and help build a world-class hardware team.
• The chance to be among the first engineers in the UK operation and part of a very small global group.

How to apply

Interested candidates are invited to contact Rachel Mason, Business Manager in Semiconductors, for further information and to apply. The posting also provides an application link and direct contact details for the recruiter.

The role is based in Cambridgeshire, England, with onsite working required in Bristol or Cambridge. The employer states that candidates must already be living and working in the United Kingdom.

Degree Requirement: Not Specified

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