Senior/Staff Digital Design Engineer

Senior/Staff Digital Design Engineer Overview

This role is for an experienced digital design engineer to join a fast-growing deep-tech hardware team building a highly complex, low-latency, high-throughput compute platform. The business is backed by substantial funding and works with major industry and research partners around the world. It is developing highly innovative systems and is operating in a genuinely frontier-technology space, so the work is both technically demanding and highly novel.

The team is expanding quickly, and this position offers the chance to contribute to the world’s first quantum error correction stack. Direct experience in quantum error correction is not essential, but strong classical digital design expertise is important, along with the ability to adapt to new technologies and changing requirements as the product and market evolve.

What you will do

• Design and improve complex RTL with a focus on both performance and area efficiency.
• Build deeply pipelined logic blocks that can operate at very high clock frequencies.
• Contribute to architecture-level decisions for a multi-FPGA system that must perform complex operations deterministically and at very high throughput.
• Review specifications and RTL created by junior engineers, offering technical feedback and design guidance.
• Work closely with software engineers to ensure hardware and software development stay aligned.
• Support and mentor junior team members as the hardware group continues to grow.
• Help identify and implement creative solutions to difficult technical challenges.
• Play a senior technical role in shaping a fast-moving product where requirements may change quickly.

What the employer is looking for

• Substantial professional experience in digital design engineering, suitable for a senior or staff-level appointment.
• Strong classical digital design capability and confidence working on highly complex hardware systems.
• Experience in at least one of the following areas: FPGA or ASIC implementation of modern decoding or signal-processing algorithms; SoC design that combines CPUs with custom accelerators; or large-scale FPGA/ASIC system development.
• Hands-on experience with modern FPGA technologies and platforms.
• Strong ability to test, troubleshoot, and improve complex digital systems.
• Experience turning high-level product goals into precise technical specifications.
• ASIC design experience, including work in sub-48nm process nodes, is desirable and specifically mentioned.
• Comfort working in a collaborative, fast-paced environment where priorities can shift as the technology develops.
• Ability to contribute to system architecture, not just detailed implementation.
• Willingness to be onsite in Cambridge three days per week.
• Although quantum error correction experience is not required, the role suits someone who can quickly learn new technical domains and thrive in a cutting-edge research-led environment.

Package and perks

• Salary up to £90,000, depending on experience.
• Share options as part of the overall package.
• Bonus opportunity.
• Private medical insurance.
• Additional insurance benefits.
• The chance to join a well-funded company that is growing rapidly.
• Exposure to advanced research and development in a highly innovative field.
• Opportunity to work alongside leading industry and research partners internationally.
• Visa sponsorship may be available if required.

Working arrangement

The role is based in Cambridge, England, with a hybrid pattern that requires attendance in the office three days each week.

How to apply

Interested candidates are invited to apply now. For further information, the contact named on the posting is Rachel Mason, Business Manager in Semiconductors at IC Resources.

The page also provides an application route through the recruiter’s “Apply Now” option and indicates that candidates can contact Rachel Mason directly for more information.

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Degree Requirement: Not Specified

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