Staff ASIC Design Engineer

Staff ASIC Design Engineer Overview

This is a senior engineering opportunity focused on advanced silicon design for next-generation graphics technology. The organisation develops foundational intellectual property used in leading graphics processors for mobile, smart, and connected devices, and the role sits within a highly capable engineering group working at the cutting edge of GPU development. The position offers the chance to take real ownership of complex hardware work, influence technical direction, and contribute to products where performance, power efficiency, and reliability are all critical.

What you will be doing

• Partner with design, verification, and validation colleagues to deliver sophisticated silicon solutions from concept through implementation.
• Write and maintain detailed micro-architecture specifications and execution plans that align with project objectives and delivery expectations.
• Analyse complex hardware blocks and improve them across the key trade-offs of frequency, area, power, and performance.
• Participate actively in design reviews and provide feedback that is clear, constructive, and technically rigorous.
• Help maintain a strong design environment by tracking down issues, debugging problems, and driving them through to resolution.
• Organise your own workload, plan delivery milestones, and complete assigned work packages to agreed timescales.
• Stay informed about new tools, methods, and best practices that can improve silicon design quality and productivity.
• Support and mentor graduate engineers and early-career team members, helping them grow both technically and professionally.

What the role requires

• Deep knowledge of digital IC design approaches and the methodologies used in modern semiconductor development.
• Practical RTL design experience at IP or SoC level, with SystemVerilog used as a core design language.
• A proven track record of improving designs while balancing performance, power consumption, and silicon area.
• Hands-on experience with ASIC or FPGA design tools and the environments used to develop and verify hardware.
• Some familiarity with formal verification or proof-oriented methods used to validate design intent.
• Understanding of CPU, DSP, or FPU architectures, including how to approach debug and test activities.
• Programming or scripting skills in one or more of C, SystemC, C++, Python, Perl, or TCL.
• Knowledge of how verification requirements are derived from architectural and functional specifications.
• Experience with GPU or CPU design methodologies, including UVM-based approaches.
• Experience at a level appropriate for a Staff engineer, with the ability to operate independently and contribute to technical leadership.

Package and location

• The role is based in Bristol, England.
• The compensation package includes a competitive base salary.
• A bonus scheme is also included.

How to apply

Interested candidates are invited to apply through the job advert using the provided application route. The posting also lists a named recruiter contact, Rachel Mason, Business Manager for Semiconductors, along with a phone number and email address for enquiries or to request a call.

Degree Requirement: Not Specified

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