Lead Verification Engineer

Lead Verification Engineer Overview

This opportunity is for a senior verification specialist to join a global semiconductor business in Edinburgh and take ownership of the verification of complex digital and mixed-signal ASIC designs. The position is focused on making sure silicon is functionally correct, robust, and ready for delivery by applying advanced verification techniques and working closely with the wider design team.

The role sits within a technically strong semiconductor environment where the engineer will collaborate with architects, RTL designers, and other verification specialists. The work is centred on real silicon development and is intended for someone who can make a meaningful contribution at a senior level, both through hands-on technical execution and by helping improve the team’s overall verification capability.

What you will do

• Plan and execute thorough verification strategies for sophisticated mixed-signal ASIC designs.
• Build and maintain verification environments using SystemVerilog and UVM.
• Develop test cases, debug failures, and validate functionality, performance, and boundary conditions.
• Run block-level and full-chip verification activities, including simulation, coverage review, and regression analysis.
• Work with design engineers to understand the specification and turn it into clear verification requirements.
• Investigate and resolve issues discovered during verification and during post-silicon validation.
• Guide and support junior engineers while helping to strengthen verification methods and infrastructure.
• Contribute to code reviews and continuous improvement across design and verification practices.
• Debug gate-level simulations as part of the verification flow.

What the employer is looking for

• Extensive experience in digital and/or mixed-signal design verification, with more than 10 years in the field.
• Strong working knowledge of SystemVerilog and UVM, plus experience with industry-standard simulation tools.
• A solid grasp of digital design fundamentals, RTL design, and ASIC development flows.
• Ability to automate tasks using scripting languages such as Python, Perl, or Tcl.
• Experience with formal verification, assertion-based verification, and coverage-driven methods.
• Excellent problem-solving skills and a meticulous approach to debugging and analysis.
• Strong communication and teamwork skills, with the ability to collaborate across engineering disciplines.
• Experience with version control systems and CI/CD workflows.
• Additional exposure to methodologies such as eRM or hardware/software co-simulation would be beneficial.
• Knowledge of common protocols such as AMBA and I2C would be an advantage.
• The role is pitched at a senior verification level, described in the advert as Staff Design Verification Engineer / Lead Verification Engineer.

Package and other details

• Salary is advertised at up to £95,000, depending on experience.
• The compensation package also includes RSUs and a performance-related bonus.
• Relocation assistance is available.
• Visa sponsorship is available where required.
• The company presents Edinburgh as an attractive location for semiconductor and embedded-systems work, with a good balance of career opportunity, lifestyle, and cost of living.

How to apply

Interested candidates are invited to apply now or contact Rachel Mason, Business Manager in Semiconductors, for more information. The advert provides direct contact details for Rachel Mason, including a phone number and email address, and also offers a request-a-call option.

The page also includes an application route through the recruiter’s website, where candidates can submit their details or upload a CV to be considered for the role.

Degree Requirement: Not Specified

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