SOC Architect R D

SOC Architect R D Overview

This is a senior architecture opportunity in a new and highly specialised function within a cutting-edge quantum computing setting. The role focuses on system-on-chip and hardware architecture, with responsibility for helping define the integrated chip architecture of a complex platform that brings together multiple advanced technologies. It is a high-impact position for someone who enjoys broad technical ownership, close collaboration with external partners, and shaping the direction of an ambitious R&D programme.

What you will do

• Lead the definition and development of the overall SOC and hardware architecture for a new technical function.
• Act as a major technical contributor in the design of an integrated chip that combines several advanced technology domains.
• Take responsibility for key architectural decisions and help guide the overall technical direction of the programme.
• Work directly with suppliers, the fabrication partner, and custom packaging specialists to create precise technical definitions and interface requirements.
• Use your R&D background to evaluate new products, technologies, and process options as part of the architecture and selection process.
• Support the development of a sophisticated SOC that blends emerging technologies with more conventional ASIC and SOC silicon approaches.
• Apply experience in integrating different materials and technologies to solve complex system-level architecture problems.
• Contribute to decisions around partitioning, integration, and advanced packaging for multi-die and chiplet-based solutions.

What the employer is looking for

• Extensive experience in ASIC or SOC hardware architecture engineering, ideally gained in a research and development environment.
• A proven history of completing multiple tape-outs.
• Confidence operating in an R&D-style role where new technology assessment and selection are central to the work.
• Experience with advanced process technologies and leading-edge semiconductor nodes.
• Familiarity with technologies such as PICs, photonics, GaN, SiGe, FinFET, and FD-SOI.
• Knowledge of advanced packaging and integration methods, including 2.5D and 3D packaging, system-in-package approaches, complex chiplets, and partitioning.
• Experience working with heterogeneous technology stacks and combining different materials in complex hardware systems.
• The ability to contribute to a demanding architecture role with significant responsibility for the overall solution.
• Quantum computing experience is not essential, but it would be a plus.
• The most important background is practical experience integrating diverse technologies and materials into advanced chip designs.
• The role is based in Oxfordshire, England, and the level of flexibility offered depends on the candidate’s experience and seniority.

Additional information

• Visa sponsorship may be available for applicants with the relevant skills.
• Relocation support may also be offered.
• Candidates are encouraged to contact the named recruiter for further information and to apply.

To apply or request more details, candidates should use the application option on the posting or contact the recruiter directly for a conversation about the role.

Degree Requirement: Not Specified

Visa Sponsorship Promising