Lead/Principal DFT Engineer

Lead/Principal DFT Engineer Overview

Fractile is looking for a senior design-for-test specialist to help shape the test architecture for a large AI accelerator system-on-chip. The company is building the silicon, systems, and software intended to push past the memory wall, which it describes as a key hardware limit holding back the next generation of AI. The role sits at the intersection of chip architecture, test strategy, implementation, and production readiness, and will play a major part in ensuring the company’s hardware can be manufactured, tested, and ramped successfully at scale.

What you will do

• Take full ownership of the DFT architecture for a large AI accelerator SoC, covering scan, compression, MBIST, LBIST, and boundary scan.
• Define the overall DFT methodology, implementation flow, and the standards used to decide when the design is ready for sign-off.
• Lead the incorporation of DFT tools and associated flows into the broader EDA setup used by the engineering team.
• Develop a hierarchical DFT plan that works effectively for multi-core architectures and large memory-heavy designs.
• Create the scan architecture, choose the compression approach, and define the ATPG strategy.
• Establish the memory test and repair methodology for substantial embedded RAM blocks.
• Set up test strategies that account for power limitations and support at-speed testing requirements.
• Collaborate closely with RTL and physical design engineers to ensure DFT is integrated cleanly and that timing closure is achieved.
• Work alongside test engineering and product engineering teams to bring up ATPG patterns on ATE, debug issues, and support production test and yield improvement.
• Coach and support other DFT engineers, helping raise the technical capability of the wider team.

What they are looking for

• Deep experience in DFT for complex ASIC or SoC projects, typically built over 10 or more years.
• Evidence that you have owned the DFT architecture for at least one large tapeout.
• Strong technical depth in scan, compression, ATPG, and MBIST.
• Practical experience with established industry tools such as Synopsys or Tessent.
• A solid understanding of clocking, resets, power domains, and the physical constraints that affect implementation.
• Experience supporting silicon bring-up, debugging, and yield ramp activities.
• Comfort working on ambiguous problems that have a large technical and business impact.
• The ability to think at an architectural level while still being willing to work hands-on in the details.
• A track record of setting direction without losing touch with implementation.

Team and company context

Fractile was founded in 2022 and has grown to more than 100 people across its London and Bristol locations. The business positions itself within the UK frontier AI ecosystem and says it is expanding quickly. The company also states that it values a broad range of perspectives and actively encourages applications from people underrepresented in hardware and software engineering.

Working arrangement

This is a hybrid role. The expectation is to work from the London and Bristol offices for around two to three days each week.

Pay and perks

• Competitive compensation.
• Equity with real value in the business.
• Usual company benefits.

Additional notes

The posting mentions that the work involves technologies covered by UK and international export control regulations. Because of that, some positions may require extra checks to confirm eligibility under the relevant laws. The company says it will be open about any such requirements during the hiring process.

How to apply

Applications are submitted through the online Greenhouse form. Candidates can apply directly from the job page using the quick-apply process, which asks for standard details such as name, contact information, CV, cover letter, education history, and links such as LinkedIn or a personal website.

Degree Requirement: Not Specified

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