STA Engineer

STA Engineer Overview

An established technology company in Cambridge is looking to add a Static Timing Analysis Engineer to its growing engineering team. The business develops a range of high-volume computing and embedded products, and this opening has come about because of continued expansion. It is a strong opportunity for someone who wants to work in a highly collaborative environment and contribute across the complete chip development flow, from the earliest design work through to silicon delivery and final product release.

The team is described as small and close-knit, which means engineers are given broad exposure to the full development process and can have a direct influence on product outcomes. The role is suited to someone who enjoys technically demanding semiconductor work and wants to make a visible impact within a strong engineering culture.

What you will do

• Perform static timing analysis at both chip-wide and block level for complex ASIC and SoC designs.
• Own and drive timing closure through every stage of implementation, beginning with synthesis and continuing through to sign-off.
• Investigate and resolve timing problems, including setup and hold failures, clock-gating concerns, and issues linked to signal integrity.
• Develop timing constraints and help ensure that timing models and analysis methodologies are correctly defined and consistently applied.
• Work closely with Physical Design, RTL Design, and Verification colleagues to improve performance, power efficiency, and area usage.
• Support sign-off-related work, including timing verification and preparation for silicon bring-up.
• Debug difficult timing issues that arise in advanced process technologies.
• Contribute across the full chip development lifecycle, from early design stages through to silicon release and product launch.
• Operate as part of a small engineering group where your work will have a direct effect on the product.

What the company is looking for

• A strong academic background in Electronics, Electrical Engineering, or a similar discipline.
• Previous industry experience in Static Timing Analysis, Physical Design, or ASIC implementation.
• A deep understanding of timing closure approaches and sign-off flows for advanced ASIC and SoC designs.
• Practical experience with standard EDA tools such as Synopsys PrimeTime, Design Compiler, and place-and-route tools.
• Experience working on complex, high-performance semiconductor products, ideally in AI, HPC, or data-centre environments.
• Strong scripting ability in Tcl, Perl, or Python to automate timing analysis and improve design processes.
• Excellent communication skills and the ability to work effectively with cross-functional engineering teams.
• Experience handling timing challenges in advanced process nodes.
• The ability to thrive in a technically challenging role with broad exposure and real responsibility.

Why this opportunity stands out

• Excellent base salary.
• Additional benefits are offered.
• Work for an established company with a strong engineering-led culture.
• Join a small team where your contribution will be highly visible and meaningful.
• Gain exposure to the full chip lifecycle and a wide range of technical challenges.
• Work on products that are technically sophisticated and commercially important.

How to apply

For more information about this opportunity, or to discuss other Physical Design roles across the UK and Europe, you can contact Jordan Browne at IC Resources. The posting also provides an application route via the “Apply Now” option.

The recruiter listed for this role is Jordan Browne, who specialises in ASIC, Verification, and Physical Design. Contact details are provided on the page for direct enquiries.

Additional context

The role is based in Cambridgeshire, England, and is associated with a Cambridge technology company. The page does not state any specific working arrangement such as remote or hybrid, so the safest interpretation is that the position is site-based unless otherwise confirmed during the application process.

The posting does not include any explicit statement about UK visa sponsorship or right-to-work eligibility.

Degree Requirement: Not Specified

Visa Sponsorship May be