Senior Verification Engineer

Senior Verification Engineer Overview

This opportunity is with a successful British technology business that develops innovative computing platforms used by a wide range of developers, educators, engineers, and hobbyists around the world. The company is known for accessible, high-performance computing and has built a strong position in embedded and edge computing. It is now investing further in its next generation of silicon platforms and growing its internal ASIC capability to support an ambitious product roadmap.

The position would suit someone who enjoys working independently while still being part of a team of technically minded colleagues. The business is described as having a strong leadership group and a positive working environment. The role is based in Cambridge and is expected to be carried out on site full time.

What you will do

• Take responsibility for verification planning and execution across both IP-level and chip-level work.
• Work closely with the design team on an ongoing basis to make sure verification activity is aligned with design goals and implementation details.
• Prepare thorough verification plans for the blocks and chips under development.
• Create test benches either from scratch or by building on existing shared verification components where appropriate.
• Support the company’s expanding ASIC effort as it moves into a new stage of growth and product development.

What the employer is looking for

• At least three completed projects with direct, practical verification experience.
• Experience building test benches from the ground up using SystemVerilog, Python, or UVM.
• Ability to write embedded C, ideally with exposure to Cortex-M microcontrollers.
• Strong technical knowledge of at least one demanding IP protocol or interface, such as PCIe, HDMI, USB, SDIO, or AMBA-based architectures.
• Experience producing functional coverage and SystemVerilog assertions.
• Good understanding of front-end design and development processes.
• Experience with low-power simulation work.
• Knowledge of SoC verification topics such as memory caches, DMA, and security features like TrustZone or an equivalent architecture.
• Hands-on use of Cadence simulation tools, including gate-level simulation.
• Ability to use scripting and build/automation tools such as Bash, TCL, Make, and YAML.
• Someone who can operate autonomously while still collaborating effectively with like-minded technical peers.
• Willingness and ability to work full time from the Cambridge site.

What is offered

• An excellent compensation package.
• A range of additional non-cash benefits.
• The chance to join a highly successful and well-regarded technology company.
• A supportive leadership team and a strong workplace culture.
• The opportunity to contribute to an important growth phase as the company expands its silicon and ASIC activities.

How to apply

Interested candidates are invited to apply now. For further information, the contact named on the listing is Rachel Mason, Business Manager for Semiconductors at IC Resources. The page also provides a direct phone number, email address, and an option to request a call.

Degree Requirement: Not Specified

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